Identifying JTAG

This is a quick-hit post because as I’ve been working on some hardware hacking efforts I realized that while there are a lot of good resources on identifying JTAG interfaces and standards, there wasn’t really a good single page view of them.  With that in mind, I lifted the following images from the excellent resource at http://www.jtagtest.com/pinouts/ and put them into a single page view.  Full credit to JTAGtest… I just wanted something I could quickly reference.

Before all of the images, a quick reference on the more common naming conventions:

  • +5V = 5 volt power
  • +12V = 12 volt power
  • CS# = Chip Select
  • DBGRQ = Debug Request
  • DSCK = Digital Simple Clock
  • DSDI = Digital Simple Data Interface
  • GND = Ground
  • ISR = In System Reprogramming
  • MISO = Master In Slave Out
  • MOSI = Master Out Slave In
  • RTCK = Return Test Clock
  • SCK = Clock Signal
  • SRESET = System Reset
  • SRST = System Reset
  • TCK = Test Clock
  • TDI = Test Data In
  • TDO = Test Data Out
  • TMS = Test Mode Select
  • TRST = Test Reset
  • VCC = Voltage Controlled Clock
  • VLFS_ = Voltage Low and Full Speed
  • VPUMP = Programming Voltage
  • VREF = Voltage Reference
  • VTREF = Voltage Reference
  • VSUPPLY = Voltage Supply